MetaVerified Source

Machine Learning SoC Architect at Meta

212K–294K
Onsite · San Jose, California
Posted August 3, 2026
payroll

Overview

Meta seeks a Machine Learning SoC Architect to lead ASIC design for silicon underpinning AI and data center workloads at scale. You will define architecture performance modeling and roadmap while partnering with silicon and software teams. This role drives innovation in custom silicon solutions shaping the future of social technology.

What You'll Do9

  • 1Analyze algorithms and map data center workloads to heterogeneous ASICs containing multiple programmable processors and accelerators
  • 2Perform calculations to specify throughput memory bandwidth and latency evaluating performance versus area and power tradeoffs
  • 3Drive architecture definition for compute memory Network-On-Chip collectives debug chiplet based multi die SoCs and other subsystems
  • 4Identify workloads and micro benchmarks drive simulation and emulation to define and validate architecture
  • 5Evangelize architectural solutions mentor architecture team members
  • 6Collaborate with RTL design verification firmware development pre post silicon validation and program management to deliver functional silicon on schedule
  • 7Work with software and firmware teams to meet application performance goals while ensuring software development efficiency
  • 8Define architecture and microarchitectural specifications align architecture RTL and physical design teams
  • 9Pre-silicon simulation for custom silicon and SoC designs

Requirements10

  • 1Bachelor degree in Computer Science Computer Engineering or equivalent practical experience
  • 212+ years defining and delivering high performance ASICs focusing on architecture and performance analysis
  • 3Proficiency in C++ and Python for simulation models automation frameworks and performance analysis tools
  • 4Experience with data center AI accelerator or HPC workloads on custom silicon
  • 5Master's or PhD in Electrical Engineering Computer Engineering or related field
  • 6Familiarity with post-silicon performance validation and model-to-hardware correlation
  • 7Experience building scaling performance modeling infrastructure for hyperscale data center ASICs including network storage or AI inference accelerators
  • 8Domain knowledge in power performance tradeoffs ML networks such as PyTorch
  • 9Master's or PhD in Electrical Engineering Computer Engineering or related field
  • 10Experience building or scaling performance modeling infrastructure for Meta internal projects

Salary Insight

$212 - $294k per year

Location

Typeonsite
LocationSan Jose, California

Required Skills

C++PythonASIC performance modelingComputer ArchitectureMicroarchitectural analysisData center workload performance analysisHardware/software partitioning
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