Performance Architect, RISC-V CPU
Overview
As a Core Performance Architect at SiFive, you will own the research and development of next-generation high performance processors, driving architecture and micro-architecture innovations to meet aggressive performance targets. You will guide a performance team and collaborate closely with architecture and design teams to model and deliver state-of-the-art RISC-V CPU cores. This role sits at the intersection of performance modeling, hardware design, and workload analysis, offering the opportunity to shape the future of high-performance computing. Your work will directly impact SiFive's leadership in the RISC-V ecosystem, with the challenge of pushing performance boundaries in a rapidly evolving industry.
What You'll Do7
- 1Research, model, and develop architecture and micro-architecture features to build state-of-the-art performance processors that hit aggressive performance targets.
- 2Design and run experiments to evaluate and refine architecture and micro-architecture ideas, focusing on high-performance out-of-order CPU designs.
- 3Collaborate with the design team to implement and deliver performance targets in RTL, ensuring seamless handoff from performance models to hardware.
- 4Analyze performance bottlenecks in micro-architecture and the software stack, identifying optimization opportunities and guiding design decisions.
- 5Develop workload characterization techniques to pinpoint HW/SW performance bottlenecks and drive architecture improvements.
- 6Apply workload reduction techniques to enable efficient performance simulation and projection, accelerating the evaluation cycle.
- 7Guide the performance team in adopting best practices for modeling and validation, ensuring high-quality results and timely delivery.
Requirements10
- 1MS in Computer Science or Computer Architecture
- 21+ years of experience in high performance processor development
- 31+ years involved in an engineering team delivering HW or SW products
- 4Hands-on expertise with HW development flows: RTL implementation, verification/validation, backend flows, and FPGA flows
- 5FPGA debug expertise using Integrated Logic Analyzer for waveform capture and debug
- 6Knowledge in analyzing performance bottlenecks in micro-architecture and software stack
- 7Strong foundation in computer architecture of high performance out-of-order CPU designs
- 8Awareness of known industry micro-architectures (a plus)
- 9Strong foundation in workload characterization to identify HW/SW performance bottlenecks
- 10Strong foundation in workload reduction techniques for efficient performance simulation
Salary Insight
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