Principal Sr. Principal Technical Program Manager IP ASIC Platform
Overview
Eliyan builds interconnect technology enabling chiplet systems. The role owns end-to-end execution of IP ASIC and platform programs delivering high-bandwidth low-power solutions using open standards and proprietary interconnect. This is a high-visibility ownership position at a fast-moving early-stage semiconductor startup.
What You'll Do11
- 1Lead program leadership for IP ASIC and platform programs from architecture through production readiness
- 2Plan and manage integrated program schedule across design verification DFT physical design packaging and software
- 3Coordinate daily cross-functional efforts with digital design analog mixed-signal packaging and silicon bring-up teams
- 4Manage external IP vendors and OSAT packaging partners ensuring accountability to commitments
- 5Serve as primary customer interface defining deliverables and integrating Eliyan solutions
- 6Define milestones maintain risk register and proactively mitigate schedule risks
- 7Allocate program budgets optimize resource utilization and track spend
- 8Conduct regular technical reviews surface tradeoffs and drive performance cost and schedule decisions
- 9Provide executive reporting with KPIs translating technical detail into concise updates
- 10Establish and improve program management practices and documentation
- 11Influence engineering teams without direct authority aligning multi-program initiatives
Requirements12
- 1Bachelor’s or Master’s degree in Electrical Engineering Computer Engineering or related field
- 215+ years semiconductor program management including pre-silicon and post-silicon execution across two full IP or ASIC programs
- 3Proven ability to lead large-scale multi-disciplinary programs making portfolio-level trade-offs
- 4Deep knowledge of silicon development lifecycle front-end back-end design DFT packaging PCB platform integration
- 5Experience managing external IP vendors and direct customer engagements around technical deliverables
- 6Strong track record driving schedule risk and budget management across concurrent workstreams
- 7Excellent verbal and written communication skills adaptable to any audience
- 8Ability to influence engineering teams without direct authority in startup environment
- 9Experience with chiplet interconnect UCIe die-to-die PHY programs or advanced packaging techniques
- 10Background in networking ASICs mixed-signal PHY SoCs high-performance computing AI/ML accelerators
- 11Working knowledge of firmware and software bring-up processes
- 12PMP PgMP or equivalent program management certification
Salary Insight
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