Principal Digital Verification Engineer
Overview
Renesas seeks a skilled professional to lead verification of memory interface products for datacenters focusing on high bandwidth low power solutions. The engineer will develop digital sections of DDR5 DDR6 and future memory buffers. This role drives verification strategy execution and ensures designs meet functional and performance goals.
What You'll Do11
- 1Drive the Memory interface products verification effort including defining strategy creating test plans and executing tests
- 2Technically collaborate with verification engineers providing guidance and mentorship
- 3Develop and quality control verification test plans
- 4Work with design teams to ensure testability and address improvements
- 5Identify and implement enhancements to verification processes for optimal quality and efficiency
- 6Monitor coverage of design verification
- 7Provide regular updates to management on verification progress
- 8Own verification environments for assigned blocks and designated tools
- 9Drive UVM based testbench optimization
- 10Lead debugging activities and resolve complex issues
- 11Establish metrics for continuous improvement
Requirements8
- 18+ years experience with DDR5 DDR6 memory buffer verification
- 2Spark and Airflow proficiency for ETL pipeline development
- 3CPC Card certification preferred
- 4AWS Certified experience beneficial
- 55+ years building verification frameworks
- 610+ years expertise in digital section verification
- 7Master's degree in Electrical Engineering or equivalent with 8+ years experience
- 8Bachelor's degree in Electrical Engineering or equivalent with 10+ years experience
Salary Insight
Salary not disclosed in listing
Location
Required Skills
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