HBM Memory Design Architect, PhD
Overview
You will own the design and analysis of digital and analog circuits for HBM memory products, simulating and optimizing DRAM circuits at block and full-chip level. You will join a highly innovative team using state-of-the-art memory technologies to develop the most advanced HBM products in the industry. Your work will directly influence future memory architectures, with a focus on AI-driven design research. This role offers the chance to conduct pathfinding for next-generation HBM solutions and contribute to groundbreaking innovations at Micron.
What You'll Do7
- 1Design and analyze DRAM circuits, including CMOS and mixed-signal designs, for HBM products.
- 2Simulate and optimize circuit performance using Finesim and Hspice to ensure functionality and timing closure.
- 3Evaluate full-chip or block-level functionality, identifying and resolving design issues to deliver functionally correct designs.
- 4Conduct pathfinding for future HBM architectures, performing feasibility analyses and recommending innovative solutions.
- 5Collaborate with cross-functional teams to design, layout, and optimize Memory, Logic, and Analog circuits.
- 6Leverage AI tools and techniques to enhance design methodologies and research outcomes.
- 7Communicate technical findings and design trade-offs to peers and stakeholders in both verbal and written forms.
Requirements8
- 1PhD or Master's degree in Electrical Engineering or related field, with relevant prior experience (NCG acceptable).
- 2Extensive knowledge of CMOS circuit design and device physics.
- 3Experience with schematic entry and simulation using Finesim and/or Hspice.
- 4Knowledge of DRAM circuit design, high-speed clocking, or interface development.
- 5Understanding of timing, area, power, and complexity trade-offs in high-speed DRAM or mixed-signal design.
- 6Strong analytical and problem-solving skills, with the ability to convey complex technical concepts.
- 7Self-motivated team player with excellent communication skills.
- 8Design or verification or layout experience with DDR, LPDDR, HBM, or CIM is a plus.
Salary Insight
Salary not disclosed in listing
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