Apple
AppleVerified Source

CPU Pre-Silicon Engineering Program Manager

172K–306K
Onsite · Austin, Texas
Posted August 12, 2026
payroll

Overview

Own the full lifecycle of CPU IP programs at Apple, driving from spec to tapeout and post-silicon. You will be embedded with the CPU design team, collaborating with architecture, logic, verification, physical design, and DFT teams. Scale your impact across the M1/M2 Mac, iPhone, iPad, and Apple Watch. This role demands technical depth and leadership to influence decisions and deliver industry-leading power and performance.

What You'll Do6

  • 1Drive the development of CPU IP across several programs, setting milestones and tracking progress.
  • 2Negotiate project schedules and deliverables with technical leads and multi-functional partners.
  • 3Run regular project meetings to focus the team on upcoming landmarks and resolve technical issues, pulling in experts when needed.
  • 4Identify risks and dependencies, generate mitigation plans, and ensure resolution.
  • 5Communicate program status and blocking issues to multi-functional teams and management levels.
  • 6Collaborate with architecture, logic design, verification, physical design, DFT, and debug teams to align on tradeoffs and challenges.

Requirements6

  • 1BS + 10 years of relevant experience.
  • 2Proven CPU development experience in design, verification, implementation, physical design, or silicon validation.
  • 3Technical leadership or project management experience, with strong communication and executive presentation skills.
  • 4Strong time and task leadership, with consistent attention to detail and organization skills.
  • 5Technical depth in one or more areas: architecture, logic, verification, or physical design, with working knowledge of others.
  • 6Ability to work across multiple sites and multi-functionally, building trust and leading through influence.

Salary Insight

$172 - $306k per year

Location

Typeonsite
LocationAustin, Texas

Required Skills

CPU developmentProgram managementProject schedulingRisk identificationExecutive communicationTechnical depth in architectureSilicon validationBS degree
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